Пытаюсь перенести ради интереса код из BASCOM в FastAVR, что бы почувствовать разницу. Версия 4.3. Версии 4.1 наверное уже не найти.
Вроде бы исправил все что смог, компилятор на синтаксис уже не жалуется, а вот assembler выдает "main.asm(1817): error: Duplicate label: 'saturation'" в месте заполнения массива константами.
saturation: .db 0x1a,0x1b,0x1c,0x1c,0x1c,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x21,0x20,0x20,0x1f,0x1e .db 0x1e,0x1f,0x20,0x20,0x20,0x20,0x22,0x23,0x24,0x25,0x26,0x26,0x25,0x25,0x24,0x23 .db 0x23,0x24,0x25,0x25,0x25,0x25,0x27,0x29,0x2a,0x2b,0x2c,0x2c,0x2b,0x2b,0x2a,0x29
'/////////////////////////////////////////////////////////
'/// FastAVR Basic Compiler for AVR by MICRODESIGN ///
'/// Name of Your project
'/////////////////////////////////////////////////////////
$Device= 8535 ' used device
$Stack = 32 ' stack depth
$Clock = 16 ' adjust for used crystal
$Source= Off
$Baud = 57600
$Lcd = PORTC.4, RS=PORTC.0, EN=PORTC.1, 16, 4
'Cls
'Cursor Off$Timer0=Timer, Prescale=8
$Timer1=Timer, Prescale=256, CompareA=DisConnectDeclare Interrupt Ovf0()
Declare Interrupt Oc1A()
Declare Interrupt Int0() 'конфигурируем прерывание с ДПКВStart Timer0
Start Timer1
Enable Oc1A
Int0 Rising
Enable Int0
Enable InterruptsStart Adc
Declare Sub SetPortState(F As Byte , S As Byte)
Dim J As Byte
Dim D As Integer
Dim N As Byte
Dim I As Byte
Dim R As Byte
Dim Q As Byte
Dim X As Word
Dim Y As Word
Dim X1 As Byte
Dim X2 As Byte
Dim X3 As Byte
Dim X4 As Byte
Dim Rx As String * 100
Dim Interspace As Integer 'время в единицих TIMER1 между импульсами ДПКВ
Dim Pulseflag As Bit
Dim Cycle As Byte : Cycle = 1 'счетчик наступления рабочтей точки МВТ
Dim PortState(8) As Byte 'в этом массиве я храню текущее состояние форсунок. Только для работы PWM HOLD
Dim Port As Byte
Dim AFS As Integer
Dim EventTime(5) As Integer 'время наступления событий
Dim EventShift(5) As Byte 'расчетный период, когда должно наступить событие
Dim EventEnable(5) As Byte 'массив флагов исполненности событий
Dim Saturation As Flash ByteDim CylindersCount As Byte : CylindersCount = 4 'количество цилиндров в данной конфигурации
Dim PhaseInjShift As Integer : PhaseInjShift = 10 'за какой количество тиков таймера до ВМТ дожна зыкрыться форсунка
Dim TimeIgtCharge As Integer : TimeIgtCharge = 500 'время включения катушки перед моментом зажигания
Dim IgtAngle As Integer 'УОЗ
Dim InjTime As Word
Dim InjLagTime As Byte : InjLagTime = 62 'Время впрыскаDim C As Word
Dim G As Word
Dim RPM As Word
Dim Kx As Word
Dim Ky As Word'Dim VEtable(256) As Byte
'Dim IgtAngleTable(256) As ByteDo
If Pulseflag = 1 Then 'если сработало предывание от ДПКВ
Pulseflag = 0
PORTB.0 = 0
C = Timer1AFS = Adc(0) - 254 '259 'обрезаем все что ниже нижней работчей границы ДАД
AFS = AFS
If AFS < 1 Then AFS = 1 'Убираем отрицательные значения
AFS = AFS * 10 'Масштабируем в Byte
AFS = AFS / 32RPM = 37600 / Interspace 'Масштабируем обороты. при частоте 16МГц значению 255 будет соответствовать 10000об/мин
X = RPM / 16 : Y = AFS / 16 'Вычисляем положение в таблице
Kx = X * 16 'находим коэффициент для интерполяции по оборотам
Kx = RPM - Kx
Ky = Y * 16 'находим коэффициент для интерполяции по давлению
Ky = AFS - Ky
I = Y * 16 : I = I + X 'Вычисляем N соответсвубщего значения в массиве
X1 = Saturation(I) 'Заносим в X1
Incr I 'Следующий
X2 = Saturation(I)
I = I + 16 'переходим на следующую строку
X4 = Saturation(I)
Decr I
X3 = Saturation(I) 'И так у нас есть 4 искомых значения для того что бы из них интерполировать искомое
Ky = Ky * 100 'Для того что бы не работать с дробными числами
Ky = Ky / 16 '
Kx = Kx * 100 'Для того что бы не работать с дробными числами
Kx = Kx / 16 '
X2 = X2 - X1 'Дальше уже сложо коменнтировать, ибо код родился
X4 = X4 - X3 'каким то мгновенным озарением.
X2 = X2 * 10
X = X2 * Kx
X = X / 1000 'Что бы не работать с дробью, ранее мы умножали на 100 и на 10. Настала пора делить обатно
X = X + X1
X4 = X4 * 10
Y = X4 * Kx
Y = Y / 1000 'Что бы не работать с дробью, ранее мы умножали на 100 и на 10. Настала пора делить обатно
Y = Y + X3
X = Y - X
X = X * Ky
X = X / 100
InjTime = X1 + X 'искомое интерполированное значениеG = InjTime
'C = TIMER1 - C
PORTB.0 = 1InjTime = InjTime * 5
InjTime = InjTime + InjLagTime'Disable Compare1A
EventTime(2) = Interspace - PhaseInjShift 'Время закрытия форсунки
EventTime(4) = Interspace - IgtAngle 'Момент зажигания
EventTime(1) = EventTime(2) - InjTime 'Время открытия форсунки
EventTime(3) = EventTime(1) + InjLagTime 'время включения PWM
EventTime(5) = EventTime(4) - TimeIgtCharge 'Заряд катушки зажигания
For i = 1 To 5 : EventShift(i) = 0 : Next 'сбросим сдвиги
For i = 1 To CylindersCount -1
For j = 1 To 5 '
If EventTime(j) < 0 Then 'расчитаем сдвиги событий. Например, если форсунка должна закрыться в текущем
EventTime(j) = EventTime(j) + Interspace 'такте, но время ее открытия не "влезает" в текущий такт, т.е. идет перкрытие
Incr EventShift(j) 'Т.е. если время открытого состояния форсунки больше времени между соседними
End If 'работчими МВТ, то вычисляем сдвиг, на какую фазу придется данное событие
Next
Next
If EventTime(1) < 0 Then EventTime(1) = 1
If EventTime(3) < 0 Then EventTime(3) = 1
'Enable Compare1A'G = Lookup(10 , Saturation)
'G*5C = 50 * RPM
If C > 0 Then
Locate 1 , 1
Lcd " "
Locate 1 , 1
Lcd C
'
Locate 2 , 1
Lcd " "
Locate 2 , 1
Lcd G 'C
End If'Print Hex(interspace)
'(If Ischarwaiting() = 1 Then 'проверка наличия команды в буфере UART
Input "" , Rx
If Len(rx) = 5 Then '
'S=mid(Rx,1,2)
'T=HEXVAL(S)
'S=mid(Rx,3,2)
'dd=HEXVAL(S)
Print Hex(interspace)
Rx = ""
End If
End If)'End If
LoopSub SetPortState(F As Byte , S As Byte)
If S < 4 Then
If S = 3 Then S = 1
If S = 2 Then S = 0
If F = 1 Then PORTD.7 = S '1. форсунки в порядке их работы
If F = 2 Then PORTD.6 = S '2.
If F = 3 Then PORTD.5 = S '3.
If F = 4 Then PORTD.4 = S '4.
'if F = 5 then PortB.7 = S
'if F = 6 then PortB.6 = S
'if F = 7 then PortB.5 = S
'if F = 8 then PortB.4 = S
Else
S = S - 4
If F = 1 Or F = 3 Then PORTB.7 = S '1-3 зажигание DIS-2
If F = 2 Or F = 4 Then PORTB.6 = S '2-4
' if F = 3 then PortB.5 = S
' if F = 4 then PortB.4 = S
End If
End SubInterrupt Ovf0(), Save 1
If PortState(1) = 3 Then Toggle PORTD.7 'тут по таймеру происходит непрерывная инверсия
If PortState(2) = 3 Then Toggle PORTD.6 'выходов форсунок, находящихся в режиме PWM HOLD
If PortState(3) = 3 Then Toggle PORTD.5 '
If PortState(4) = 3 Then Toggle PORTD.4 '
'if PortState(5) = 3 then Toggle PortB.7
'if PortState(6) = 3 then Toggle PortB.6
'if PortState(7) = 3 then Toggle PortB.5
'if PortState(8) = 3 then Toggle PortB.4
End InterruptInterrupt Oc1A(), Save 1 'таймер с самозагузкой. Выполняет очередь событий
L:
Port = EventShift(n) + Cycle : If Port > CylindersCount Then Port = Port - CylindersCount 'вычисляе порт, на котором должно произойти событие
SetPortState(Port , n) 'выполняем событие
If n < 4 Then PortState(Port) = n 'если событие не связано с зажиганием, изменяем статус порта форсунки(если n=3 то HOLD PWM)
EventEnable(n) = 0 'помечаем событие, как исполненноеn = 0
D = interspace 'ищем следующие событие.
For j = 1 To 5
If EventEnable(j) = 1 And EventTime(j) < D Then 'выбираем ближайшее по времени событие. Они не отсортированы
D = EventTime(j)
n = j 'запоминаем его номер
End If
NextIf n > 0 Then 'если события не закончились
D = EventTime(n) - Timer1 'записываем разницу между текущим временем таймера и планируемым
If D < 5 Then GoTo L 'если осталось мало времени до его исполнения,
Compare1A = EventTime(n) 'или вообще мы его успели просахатить, то отправляемся на его немедленное исполнение
End If 'если время еще есть, грузим планируемое премя следующего события в регистр сравнения.
End Interrupt 'как только подойдет время таймера все повторитсяInterrupt Int0(), Save 1 'обработчик прерывания датчика в трамблере
Interspace = Timer1 'запомнили сколько тиков натикало с момента предыдущего прерывания. Почти RPM
Timer1 = 0 'обнуляем счетчик
Pulseflag = 1
Compare1A = Interspace 'загружаем в регистр сравнения максимальное время периода PRM
For j = 1 To 5 'прогоним очереь сообщений на предмет неисполненых. Такое возможно, если обороты увеличились
If EventEnable(j) = 1 Then
Port = EventShift(j) + Cycle : If Port > CylindersCount Then Port = Port - CylindersCount
SetPortState(Port , j) 'выполняем немедлянно все неисполненные.
If j < 4 Then PortState(Port) = j
End If'If EventTime(j) < Compare1A Then 'перебираем очередь сообщений
' Compare1A = EventTime(j) 'загружаем ближайщее событие
' n = j
'End If
EventEnable(j) = 1 'настал новые период, помечаем все сообщения как неисполненные
NextIncr Cycle : If Cycle > CylindersCount Then Cycle = 1 'увеличиваем счетчик периода
'If Compare1A < 4 Then Compare1A = 4 'если событие дишит в затылок. Отодвинем его чуть-чуть. В начале цикла это не зажигание. Значит не страшно'Start Timer1
End InterruptEnd
Saturation = 26 , 27 , 28 , 28 , 28 , 28 , 29 , 30 , 31 , 32 , 33 , 33 , 32 , 32 , 31 , 30,
30 , 31 , 32 , 32 , 32 , 32 , 34 , 35 , 36 , 37 , 38 , 38 , 37 , 37 , 36 , 35,
35 , 36 , 37 , 37 , 37 , 37 , 39 , 41 , 42 , 43 , 44 , 44 , 43 , 43 , 42 , 41,
41 , 42 , 43 , 43 , 43 , 43 , 45 , 48 , 49 , 50 , 51 , 51 , 50 , 50 , 49 , 48,
48 , 49 , 50 , 50 , 50 , 50 , 52 , 56 , 57 , 58 , 59 , 59 , 58 , 58 , 57 , 56,
56 , 57 , 58 , 58 , 58 , 58 , 60 , 65 , 66 , 67 , 68 , 68 , 67 , 67 , 66 , 65,
65 , 66 , 67 , 67 , 67 , 67 , 70 , 75 , 77 , 78 , 79 , 79 , 78 , 78 , 77 , 75,
75 , 77 , 78 , 78 , 78 , 78 , 81 , 87 , 89 , 90 , 92 , 92 , 90 , 90 , 89 , 87,
87 , 89 , 90 , 90 , 90 , 90 , 94 , 101 , 103 , 104 , 107 , 107 , 104 , 104 , 103 , 101,
101 , 103 , 104 , 104 , 104 , 104 , 109 , 117 , 119 , 121 , 124 , 124 , 121 , 121 , 119 , 117,
117 , 119 , 121 , 121 , 121 , 121 , 126 , 136 , 138 , 140 , 144 , 144 , 140 , 140 , 138 , 136,
136 , 138 , 140 , 140 , 140 , 140 , 146 , 158 , 160 , 162 , 167 , 167 , 162 , 162 , 160 , 158,
158 , 160 , 162 , 162 , 162 , 162 , 169 , 183 , 186 , 188 , 194 , 194 , 188 , 188 , 186 , 183,
183 , 186 , 188 , 188 , 188 , 188 , 196 , 212 , 216 , 218 , 225 , 225 , 218 , 218 , 216 , 212,
212 , 216 , 218 , 218 , 218 , 218 , 227 , 246 , 251 , 253 , 255 , 255 , 253 , 253 , 251 , 246,
246 , 251 , 253 , 253 , 253 , 253 , 255 , 255 , 255 , 255 , 255 , 255 , 255 , 255 , 255 , 255
;FastAVR Basic Compiler, ver.4.3.0, by MicroDesign
;Created 22:30:04, 04-09-2018
;
.include "C:\home\Programs\Develop\FastAVR\inc\8535DEF.INC"
;
.DSEG
.ORG 0x60
.CSEG
.ORG 0x0000
rjmp _Reset
.ORG INT0addr
rjmp IntN1
.ORG INT1addr
reti
.ORG OC2addr
reti
.ORG OVF2addr
reti
.ORG ICP1addr
reti
.ORG OC1Aaddr
rjmp IntN6
.ORG OC1Baddr
reti
.ORG OVF1addr
reti
.ORG OVF0addr
rjmp IntN9_Reset:
ldi yl,byte1(RAMEND)
out SPL,yl
ldi yh,byte2(RAMEND)
out SPL+1,yh
sbiw yl,32
ldi zl,0x18
out UCR,zl
ldi zh,byte2(16)
ldi zl,byte1(16)
out UBRR,zlldi zl,0
out TCCR1A,zl
rcall LcdIni;****** USERS BASIC CODE **********************
in zl,TCCR0
sbr zl,2
out TCCR0,zl
in zl,TCCR1B
sbr zl,12
out TCCR1B,zl
in zl,TIMSK
sbr zl,0x10
out TIMSK,zl
in zl,MCUCR
sbr zl,0x03
out MCUCR,zl
in zl,GIMSK
sbr zl,0x40
out GIMSK,zl
sei
ldi zl,0x87
out ADCSR,zl.DSEG
j: .Byte 1
.CSEG.DSEG
d: .Byte 2
.CSEG.DSEG
n: .Byte 1
.CSEG.DSEG
i: .Byte 1
.CSEG.DSEG
r: .Byte 1
.CSEG.DSEG
q: .Byte 1
.CSEG.DSEG
x_: .Byte 2
.CSEG.DSEG
y_: .Byte 2
.CSEG.DSEG
x1: .Byte 1
.CSEG.DSEG
x2: .Byte 1
.CSEG.DSEG
x3: .Byte 1
.CSEG.DSEG
x4: .Byte 1
.CSEG.DSEG
rx: .Byte 101
.CSEG.DSEG
interspace: .Byte 2
.CSEG.DSEG
cycle: .Byte 1
.CSEG.DSEG
portstate: .Byte 8
.CSEG.DSEG
port: .Byte 1
.CSEG.DSEG
afs: .Byte 2
.CSEG.DSEG
eventtime: .Byte 10
.CSEG.DSEG
eventshift: .Byte 5
.CSEG.DSEG
eventenable: .Byte 5
.CSEG.DSEG
saturation: .Byte 1
.CSEG.DSEG
cylinderscount: .Byte 1
.CSEG.DSEG
phaseinjshift: .Byte 2
.CSEG.DSEG
timeigtcharge: .Byte 2
.CSEG.DSEG
igtangle: .Byte 2
.CSEG.DSEG
injtime: .Byte 2
.CSEG.DSEG
injlagtime: .Byte 1
.CSEG.DSEG
c: .Byte 2
.CSEG.DSEG
g: .Byte 2
.CSEG.DSEG
rpm: .Byte 2
.CSEG.DSEG
kx: .Byte 2
.CSEG.DSEG
ky: .Byte 2
.CSEG
L0000:
sbrs r3,0
rjmp L0003
L0004:
clt
bld r3,0
cbi PORTB,0
in zl,TCNT1L
in zh,TCNT1H
sts c,zl
sts c+1,zh
ldi zl,byte1(0)
in zh,ADMUX
andi zh,0xe0
Or zl,zh
out ADMUX,zl
rcall _Adc
push zh
push zl
ldi zl,byte1(254)
ldi zh,byte2(254)
pop r24
pop r25
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
sts afs,zl
sts afs+1,zh
lds zl,afs
lds zh,afs+1
sts afs,zl
sts afs+1,zh
lds r24,afs
lds r25,afs+1
ldi zl,byte1(1)
ldi zh,byte2(1)
cp r24,zl
cpc r25,zh
brlt PC+0x02
rjmp L0006
L0007:
ldi zl,byte1(1)
ldi zh,byte2(1)
sts afs,zl
sts afs+1,zh
L0006:
lds r24,afs
lds r25,afs+1
ldi zl,byte1(10)
ldi zh,byte2(10)
rcall Mp16s
sts afs,zl
sts afs+1,zh
lds r24,afs
lds r25,afs+1
ldi zl,byte1(32)
ldi zh,byte2(32)
rcall Di16s
sts afs,zl
sts afs+1,zh
ldi r24,byte1(37600)
ldi r25,byte2(37600)
lds zl,interspace
lds zh,interspace+1
rcall Di16u
sts rpm,zl
sts rpm+1,zh
lds zl,rpm
lds zh,rpm+1
push zh
push zl
ldi zl,byte1(16)
ldi zh,byte2(16)
pop r24
pop r25
rcall Di16u
sts x_,zl
sts x_+1,zh
lds zl,afs
lds zh,afs+1
push zh
push zl
ldi zl,byte1(16)
ldi zh,byte2(16)
pop r24
pop r25
rcall Di16u
sts y_,zl
sts y_+1,zh
lds r24,x_
lds r25,x_+1
ldi zl,byte1(16)
ldi zh,byte2(16)
rcall Mp16u
sts kx,zl
sts kx+1,zh
lds r24,rpm
lds r25,rpm+1
lds zl,kx
lds zh,kx+1
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
sts kx,zl
sts kx+1,zh
lds r24,y_
lds r25,y_+1
ldi zl,byte1(16)
ldi zh,byte2(16)
rcall Mp16u
sts ky,zl
sts ky+1,zh
lds r24,afs
lds r25,afs+1
lds zl,ky
lds zh,ky+1
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
sts ky,zl
sts ky+1,zh
lds zl,y_
push zl
ldi zl,byte1(16)
pop r24
rcall Mpy8u
sts i,zl
lds zl,i
push zl
lds zl,x_
pop r24
add zl,r24
sts i,zl
lds zl,i
clr zh
ldi r24,byte1(saturation*2)
ldi r25,byte2(saturation*2)
add zl,r24
Adc zh,r25
lpm
mov zl,r0
sts x1,zl
lds zl,i
inc zl
sts i,zl
lds zl,i
clr zh
ldi r24,byte1(saturation*2)
ldi r25,byte2(saturation*2)
add zl,r24
Adc zh,r25
lpm
mov zl,r0
sts x2,zl
lds r24,i
ldi zl,byte1(16)
add zl,r24
sts i,zl
lds zl,i
clr zh
ldi r24,byte1(saturation*2)
ldi r25,byte2(saturation*2)
add zl,r24
Adc zh,r25
lpm
mov zl,r0
sts x4,zl
lds zl,i
dec zl
sts i,zl
lds zl,i
clr zh
ldi r24,byte1(saturation*2)
ldi r25,byte2(saturation*2)
add zl,r24
Adc zh,r25
lpm
mov zl,r0
sts x3,zl
lds r24,ky
lds r25,ky+1
ldi zl,byte1(100)
ldi zh,byte2(100)
rcall Mp16u
sts ky,zl
sts ky+1,zh
lds r24,ky
lds r25,ky+1
ldi zl,byte1(16)
ldi zh,byte2(16)
rcall Di16u
sts ky,zl
sts ky+1,zh
lds r24,kx
lds r25,kx+1
ldi zl,byte1(100)
ldi zh,byte2(100)
rcall Mp16u
sts kx,zl
sts kx+1,zh
lds r24,kx
lds r25,kx+1
ldi zl,byte1(16)
ldi zh,byte2(16)
rcall Di16u
sts kx,zl
sts kx+1,zh
lds r24,x2
lds zl,x1
Sub r24,zl
mov zl,r24
sts x2,zl
lds r24,x4
lds zl,x3
Sub r24,zl
mov zl,r24
sts x4,zl
lds r24,x2
ldi zl,byte1(10)
rcall Mpy8u
sts x2,zl
lds r24,x2
clr r25
lds zl,kx
lds zh,kx+1
rcall Mp16u
sts x_,zl
sts x_+1,zh
lds r24,x_
lds r25,x_+1
ldi zl,byte1(1000)
ldi zh,byte2(1000)
rcall Di16u
sts x_,zl
sts x_+1,zh
lds r24,x_
lds r25,x_+1
lds zl,x1
clr zh
add zl,r24
Adc zh,r25
sts x_,zl
sts x_+1,zh
lds r24,x4
ldi zl,byte1(10)
rcall Mpy8u
sts x4,zl
lds r24,x4
clr r25
lds zl,kx
lds zh,kx+1
rcall Mp16u
sts y_,zl
sts y_+1,zh
lds r24,y_
lds r25,y_+1
ldi zl,byte1(1000)
ldi zh,byte2(1000)
rcall Di16u
sts y_,zl
sts y_+1,zh
lds r24,y_
lds r25,y_+1
lds zl,x3
clr zh
add zl,r24
Adc zh,r25
sts y_,zl
sts y_+1,zh
lds r24,y_
lds r25,y_+1
lds zl,x_
lds zh,x_+1
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
sts x_,zl
sts x_+1,zh
lds r24,x_
lds r25,x_+1
lds zl,ky
lds zh,ky+1
rcall Mp16u
sts x_,zl
sts x_+1,zh
lds r24,x_
lds r25,x_+1
ldi zl,byte1(100)
ldi zh,byte2(100)
rcall Di16u
sts x_,zl
sts x_+1,zh
lds r24,x1
clr r25
lds zl,x_
lds zh,x_+1
add zl,r24
Adc zh,r25
sts injtime,zl
sts injtime+1,zh
lds zl,injtime
lds zh,injtime+1
sts g,zl
sts g+1,zh
sbi PORTB,0
lds r24,injtime
lds r25,injtime+1
ldi zl,byte1(5)
ldi zh,byte2(5)
rcall Mp16u
sts injtime,zl
sts injtime+1,zh
lds r24,injtime
lds r25,injtime+1
lds zl,injlagtime
clr zh
add zl,r24
Adc zh,r25
sts injtime,zl
sts injtime+1,zh
ldi zl,byte1(2)
ldi zh,byte2(2)
push zh
push zl
lds zl,interspace
lds zh,interspace+1
push zh
push zl
lds zl,phaseinjshift
lds zh,phaseinjshift+1
pop r24
pop r25
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
ldi zl,byte1(4)
ldi zh,byte2(4)
push zh
push zl
lds zl,interspace
lds zh,interspace+1
push zh
push zl
lds zl,igtangle
lds zh,igtangle+1
pop r24
pop r25
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
ldi zl,byte1(1)
ldi zh,byte2(1)
push zh
push zl
ldi zl,byte1(2)
ldi zh,byte2(2)
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
lds zl,injtime
lds zh,injtime+1
pop r24
pop r25
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
ldi zl,byte1(3)
ldi zh,byte2(3)
push zh
push zl
ldi zl,byte1(1)
ldi zh,byte2(1)
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
lds zl,injlagtime
clr zh
pop r24
pop r25
add zl,r24
Adc zh,r25
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
ldi zl,byte1(5)
ldi zh,byte2(5)
push zh
push zl
ldi zl,byte1(4)
ldi zh,byte2(4)
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
lds zl,timeigtcharge
lds zh,timeigtcharge+1
pop r24
pop r25
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
ldi zl,byte1(1)
sts i,zl
ldi zl,byte1(5)
push r5
inc zl
mov r5,zl
L0008:
lds zl,i
clr zh
push zh
push zl
ldi zl,byte1(0)
ldi xl,byte1(eventshift)
ldi xh,byte2(eventshift)
pop r24
pop r25
add xl, r24
Adc xh, r25
st X,zl
lds zl,i
inc zl
sts i,zl
cp zl,r5
brsh PC+0x02
rjmp L0008
pop r5
L0009:
ldi zl,byte1(1)
sts i,zl
lds zl,cylinderscount
push zl
ldi zl,byte1(1)
pop r24
Sub r24,zl
mov zl,r24
push r5
inc zl
mov r5,zl
L0010:
ldi zl,byte1(1)
sts j,zl
ldi zl,byte1(5)
push r5
inc zl
mov r5,zl
L0012:
lds zl,j
clr zh
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
ldi zl,byte1(0)
ldi zh,byte2(0)
pop r24
pop r25
cp r24,zl
cpc r25,zh
brlt PC+0x02
rjmp L0015
L0016:
lds zl,j
clr zh
push zh
push zl
lds zl,j
clr zh
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
lds zl,interspace
lds zh,interspace+1
pop r24
pop r25
add zl,r24
Adc zh,r25
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
lds zl,j
clr zh
push zh
push zl
ldi xl,byte1(eventshift)
ldi xh,byte2(eventshift)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
inc zl
st X,zl
L0015:
L0014:
lds zl,j
inc zl
sts j,zl
cp zl,r5
brsh PC+0x02
rjmp L0012
pop r5
L0013:
lds zl,i
inc zl
sts i,zl
cp zl,r5
brsh PC+0x02
rjmp L0010
pop r5
L0011:
ldi zl,byte1(1)
ldi zh,byte2(1)
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
ldi zl,byte1(0)
ldi zh,byte2(0)
pop r24
pop r25
cp r24,zl
cpc r25,zh
brlt PC+0x02
rjmp L0018
L0019:
ldi zl,byte1(1)
ldi zh,byte2(1)
push zh
push zl
ldi zl,byte1(1)
ldi zh,byte2(1)
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
L0018:
ldi zl,byte1(3)
ldi zh,byte2(3)
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
ldi zl,byte1(0)
ldi zh,byte2(0)
pop r24
pop r25
cp r24,zl
cpc r25,zh
brlt PC+0x02
rjmp L0021
L0022:
ldi zl,byte1(3)
ldi zh,byte2(3)
push zh
push zl
ldi zl,byte1(1)
ldi zh,byte2(1)
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r24
pop r25
lsl r24
rol r25
add xl, r24
Adc xh, r25
st X+,zl
st X,zh
L0021:
ldi r24,byte1(50)
ldi r25,byte2(50)
lds zl,rpm
lds zh,rpm+1
rcall Mp16u
sts c,zl
sts c+1,zh
lds r24,c
lds r25,c+1
ldi zl,byte1(0)
ldi zh,byte2(0)
adiw zl,1
cp r24,zl
cpc r25,zh
brsh PC+0x02
rjmp L0024
L0025:
ldi r24,0x7F
push r24
ldi zl,byte1(1)
pop r24
add r24,zl
rcall _LCtr
ldi zl,byte1(S000*2)
ldi zh,byte2(S000*2)
rcall _LSc
ldi r24,0x7F
push r24
ldi zl,byte1(1)
pop r24
add r24,zl
rcall _LCtr
lds zl,c
lds zh,c+1
rcall _W2Str
rcall _LBW
ldi r24,0xBF
push r24
ldi zl,byte1(1)
pop r24
add r24,zl
rcall _LCtr
ldi zl,byte1(S000*2)
ldi zh,byte2(S000*2)
rcall _LSc
ldi r24,0xBF
push r24
ldi zl,byte1(1)
pop r24
add r24,zl
rcall _LCtr
lds zl,g
lds zh,g+1
rcall _W2Str
rcall _LBW
L0024:
L0023:
L0003:
L0002:
rjmp L0000
L0001:
setportstate:
ldd r24,y+0
ldi zl,byte1(4)
cp r24,zl
brlo PC+0x02
rjmp L0028
L0029:
ldd r24,y+0
ldi zl,byte1(3)
cp r24,zl
breq PC+0x02
rjmp L0031
L0032:
ldi zl,byte1(1)
std y+0,zl
L0031:
ldd r24,y+0
ldi zl,byte1(2)
cp r24,zl
breq PC+0x02
rjmp L0034
L0035:
ldi zl,byte1(0)
std y+0,zl
L0034:
ldd r24,y+1
ldi zl,byte1(1)
cp r24,zl
breq PC+0x02
rjmp L0037
L0038:
ldd zl,y+0
brtc L0039
sbi PORTD,7
rjmp L0040
L0039:
cbi PORTD,7
L0040:
L0037:
ldd r24,y+1
ldi zl,byte1(2)
cp r24,zl
breq PC+0x02
rjmp L0042
L0043:
ldd zl,y+0
brtc L0044
sbi PORTD,6
rjmp L0045
L0044:
cbi PORTD,6
L0045:
L0042:
ldd r24,y+1
ldi zl,byte1(3)
cp r24,zl
breq PC+0x02
rjmp L0047
L0048:
ldd zl,y+0
brtc L0049
sbi PORTD,5
rjmp L0050
L0049:
cbi PORTD,5
L0050:
L0047:
ldd r24,y+1
ldi zl,byte1(4)
cp r24,zl
breq PC+0x02
rjmp L0052
L0053:
ldd zl,y+0
brtc L0054
sbi PORTD,4
rjmp L0055
L0054:
cbi PORTD,4
L0055:
L0052:
rjmp L0027
L0028:
ldd r24,y+0
ldi zl,byte1(4)
Sub r24,zl
mov zl,r24
std y+0,zl
ldd r24,y+1
ldi zl,byte1(1)
cp r24,zl
brne PC+0x02
rjmp L0058
ldd r24,y+1
ldi zl,byte1(3)
cp r24,zl
breq PC+0x02
rjmp L0057
L0058:
ldd zl,y+0
brtc L0059
sbi PORTB,7
rjmp L0060
L0059:
cbi PORTB,7
L0060:
L0057:
ldd r24,y+1
ldi zl,byte1(2)
cp r24,zl
brne PC+0x02
rjmp L0063
ldd r24,y+1
ldi zl,byte1(4)
cp r24,zl
breq PC+0x02
rjmp L0062
L0063:
ldd zl,y+0
brtc L0064
sbi PORTB,6
rjmp L0065
L0064:
cbi PORTB,6
L0065:
L0062:
L0027:
L0026:
ret
IntN9:
in r2,SREG
push zl
push zh
ldi zl,byte1(1)
ldi zh,byte2(1)
push zl
push zh
ldi zl,1
ldi xl,byte1(portstate)
ldi xh,byte2(portstate)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
ldi zl,byte1(3)
pop r24
cp r24,zl
breq PC+0x02
rjmp L0067
L0068:
in zl,PORTD
ldi r23,0x80
eor zl,r23
out PORTD,zl
L0067:
ldi zl,byte1(2)
ldi zh,byte2(2)
push zl
push zh
ldi zl,1
ldi xl,byte1(portstate)
ldi xh,byte2(portstate)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
ldi zl,byte1(3)
pop r24
cp r24,zl
breq PC+0x02
rjmp L0070
L0071:
in zl,PORTD
ldi r23,0x40
eor zl,r23
out PORTD,zl
L0070:
ldi zl,byte1(3)
ldi zh,byte2(3)
push zl
push zh
ldi zl,1
ldi xl,byte1(portstate)
ldi xh,byte2(portstate)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
ldi zl,byte1(3)
pop r24
cp r24,zl
breq PC+0x02
rjmp L0073
L0074:
in zl,PORTD
ldi r23,0x20
eor zl,r23
out PORTD,zl
L0073:
ldi zl,byte1(4)
ldi zh,byte2(4)
push zl
push zh
ldi zl,1
ldi xl,byte1(portstate)
ldi xh,byte2(portstate)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
ldi zl,byte1(3)
pop r24
cp r24,zl
breq PC+0x02
rjmp L0076
L0077:
in zl,PORTD
ldi r23,0x10
eor zl,r23
out PORTD,zl
L0076:
pop zh
pop zl
out SREG,r2
reti
IntN6:
in r2,SREG
push zl
push zh
l:
lds zl,n
clr zh
push zl
push zh
ldi zl,1
ldi xl,byte1(eventshift)
ldi xh,byte2(eventshift)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
lds zl,cycle
pop r24
add zl,r24
sts port,zl
lds r24,port
lds zl,cylinderscount
inc zl
cp r24,zl
brsh PC+0x02
rjmp L0079
L0080:
lds zl,port
push zl
lds zl,cylinderscount
pop r24
Sub r24,zl
mov zl,r24
sts port,zl
L0079:
lds zl,port
st -Y,zl
lds zl,n
st -Y,zl
rcall setportstate
adiw yl,2
lds r24,n
ldi zl,byte1(4)
cp r24,zl
brlo PC+0x02
rjmp L0082
L0083:
lds zl,port
clr zh
push zh
push zl
lds zl,n
ldi xl,byte1(portstate)
ldi xh,byte2(portstate)
pop r24
pop r25
add xl, r24
Adc xh, r25
st X,zl
L0082:
lds zl,n
clr zh
push zh
push zl
ldi zl,byte1(0)
ldi xl,byte1(eventenable)
ldi xh,byte2(eventenable)
pop r24
pop r25
add xl, r24
Adc xh, r25
st X,zl
ldi zl,byte1(0)
sts n,zl
lds zl,interspace
lds zh,interspace+1
sts d,zl
sts d+1,zh
ldi zl,byte1(1)
sts j,zl
ldi zl,byte1(5)
push r5
inc zl
mov r5,zl
L0084:
lds zl,j
clr zh
push zl
push zh
ldi zl,1
ldi xl,byte1(eventenable)
ldi xh,byte2(eventenable)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
ldi zl,byte1(1)
pop r24
cp r24,zl
breq PC+0x02
rjmp L0087
lds zl,j
clr zh
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
lds zl,d
lds zh,d+1
pop r24
pop r25
cp r24,zl
cpc r25,zh
brlt PC+0x02
rjmp L0087
L0088:
lds zl,j
clr zh
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
sts d,zl
sts d+1,zh
lds zl,j
sts n,zl
L0087:
L0086:
lds zl,j
inc zl
sts j,zl
cp zl,r5
brsh PC+0x02
rjmp L0084
pop r5
L0085:
lds r24,n
ldi zl,byte1(0)
inc zl
cp r24,zl
brsh PC+0x02
rjmp L0090
L0091:
lds zl,n
clr zh
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
push zh
push zl
in zl,TCNT1L
in zh,TCNT1H
pop r24
pop r25
Sub r24,zl
sbc r25,zh
mov zl,r24
mov zh,r25
sts d,zl
sts d+1,zh
lds r24,d
lds r25,d+1
ldi zl,byte1(5)
ldi zh,byte2(5)
cp r24,zl
cpc r25,zh
brlt PC+0x02
rjmp L0093
L0094:
rjmp l
L0093:
lds zl,n
clr zh
push zl
push zh
ldi zl,2
ldi xl,byte1(eventtime)
ldi xh,byte2(eventtime)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X+
ld zh,X
out OCR1AH,zh
out OCR1AL,zl
L0090:
L0089:
pop zh
pop zl
out SREG,r2
reti
IntN1:
in r2,SREG
push zl
push zh
in zl,TCNT1L
in zh,TCNT1H
sts interspace,zl
sts interspace+1,zh
ldi zl,byte1(0)
ldi zh,byte2(0)
out TCNT1H,zh
out TCNT1L,zl
Set
bld r3,0
lds zl,interspace
lds zh,interspace+1
out OCR1AH,zh
out OCR1AL,zl
ldi zl,byte1(1)
sts j,zl
ldi zl,byte1(5)
push r5
inc zl
mov r5,zl
L0095:
lds zl,j
clr zh
push zl
push zh
ldi zl,1
ldi xl,byte1(eventenable)
ldi xh,byte2(eventenable)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
ldi zl,byte1(1)
pop r24
cp r24,zl
breq PC+0x02
rjmp L0098
L0099:
lds zl,j
clr zh
push zl
push zh
ldi zl,1
ldi xl,byte1(eventshift)
ldi xh,byte2(eventshift)
pop r25
pop r24
add xl, r24
Adc xh, r25
ld zl,X
push zl
lds zl,cycle
pop r24
add zl,r24
sts port,zl
lds r24,port
lds zl,cylinderscount
inc zl
cp r24,zl
brsh PC+0x02
rjmp L0101
L0102:
lds zl,port
push zl
lds zl,cylinderscount
pop r24
Sub r24,zl
mov zl,r24
sts port,zl
L0101:
lds zl,port
st -Y,zl
lds zl,j
st -Y,zl
rcall setportstate
adiw yl,2
lds r24,j
ldi zl,byte1(4)
cp r24,zl
brlo PC+0x02
rjmp L0104
L0105:
lds zl,port
clr zh
push zh
push zl
lds zl,j
ldi xl,byte1(portstate)
ldi xh,byte2(portstate)
pop r24
pop r25
add xl, r24
Adc xh, r25
st X,zl
L0104:
L0098:
L0097:
lds zl,j
clr zh
push zh
push zl
ldi zl,byte1(1)
ldi xl,byte1(eventenable)
ldi xh,byte2(eventenable)
pop r24
pop r25
add xl, r24
Adc xh, r25
st X,zl
lds zl,j
inc zl
sts j,zl
cp zl,r5
brsh PC+0x02
rjmp L0095
pop r5
L0096:
lds zl,cycle
inc zl
sts cycle,zl
lds r24,cycle
lds zl,cylinderscount
inc zl
cp r24,zl
brsh PC+0x02
rjmp L0107
L0108:
ldi zl,byte1(1)
sts cycle,zl
L0107:
pop zh
pop zl
out SREG,r2
reti
L0109:
rjmp L0109saturation:
.db 0x1a,0x1b,0x1c,0x1c,0x1c,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x21,0x20,0x20,0x1f,0x1e
.db 0x1e,0x1f,0x20,0x20,0x20,0x20,0x22,0x23,0x24,0x25,0x26,0x26,0x25,0x25,0x24,0x23
.db 0x23,0x24,0x25,0x25,0x25,0x25,0x27,0x29,0x2a,0x2b,0x2c,0x2c,0x2b,0x2b,0x2a,0x29
.db 0x29,0x2a,0x2b,0x2b,0x2b,0x2b,0x2d,0x30,0x31,0x32,0x33,0x33,0x32,0x32,0x31,0x30
.db 0x30,0x31,0x32,0x32,0x32,0x32,0x34,0x38,0x39,0x3a,0x3b,0x3b,0x3a,0x3a,0x39,0x38
.db 0x38,0x39,0x3a,0x3a,0x3a,0x3a,0x3c,0x41,0x42,0x43,0x44,0x44,0x43,0x43,0x42,0x41
.db 0x41,0x42,0x43,0x43,0x43,0x43,0x46,0x4b,0x4d,0x4e,0x4f,0x4f,0x4e,0x4e,0x4d,0x4b
.db 0x4b,0x4d,0x4e,0x4e,0x4e,0x4e,0x51,0x57,0x59,0x5a,0x5c,0x5c,0x5a,0x5a,0x59,0x57
.db 0x57,0x59,0x5a,0x5a,0x5a,0x5a,0x5e,0x65,0x67,0x68,0x6b,0x6b,0x68,0x68,0x67,0x65
.db 0x65,0x67,0x68,0x68,0x68,0x68,0x6d,0x75,0x77,0x79,0x7c,0x7c,0x79,0x79,0x77,0x75
.db 0x75,0x77,0x79,0x79,0x79,0x79,0x7e,0x88,0x8a,0x8c,0x90,0x90,0x8c,0x8c,0x8a,0x88
.db 0x88,0x8a,0x8c,0x8c,0x8c,0x8c,0x92,0x9e,0xa0,0xa2,0xa7,0xa7,0xa2,0xa2,0xa0,0x9e
.db 0x9e,0xa0,0xa2,0xa2,0xa2,0xa2,0xa9,0xb7,0xba,0xbc,0xc2,0xc2,0xbc,0xbc,0xba,0xb7
.db 0xb7,0xba,0xbc,0xbc,0xbc,0xbc,0xc4,0xd4,0xd8,0xda,0xe1,0xe1,0xda,0xda,0xd8,0xd4
.db 0xd4,0xd8,0xda,0xda,0xda,0xda,0xe3,0xf6,0xfb,0xfd,0xff,0xff,0xfd,0xfd,0xfb,0xf6
.db 0xf6,0xfb,0xfd,0xfd,0xfd,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff;****** End OF USER BASIC CODE ****************
; String constants:
S000: .db " ", 0;////// LcdInit ///////////////////////////
LcdIni: in zl,DDRC
ori zl,0xf0
out DDRC,zl
sbi DDRC,0
sbi DDRC,1
cbi PORTC,0
cbi PORTC,1
ldi zl,0x18
rcall _Wms
ldi r24,0x03
rcall _LOut
ldi zl,0x08
rcall _Wms
rcall _LEN
ldi zl,0x0d
rcall _Wus
rcall _LEN
cbi PORTC,4
rcall _LEN
ldi r24,0x28
rcall _LCtr
ldi r24,0x06
rcall _LCtr
ldi r24,0x0c
rcall _LCtr
ldi r24,0x01
rcall _LCtr
ldi zl,0x04
rcall _Wms
ret_Lch: sbi PORTC,0
rjmp _LNib
_LCtr: cbi PORTC,0
_LNib: mov r21,r24
Swap r24
rcall _LOut
mov r24,r21
_LOut: in r23,PORTC
andi r23,0x0f
Swap r24
andi r24,0xf0
Or r24,r23
out PORTC,r24
rcall _LEN
ret;////// LcdEN /////////////////////////////
_LEN: sbi PORTC,1
Nop
Nop
Nop
Nop
Nop
Nop
Nop
Nop
cbi PORTC,1
push zl
ldi zl,0x04
rcall _Wus
pop zl
ret;////// Lcd Byte & Word ///////////////////
_LBW: ld r24,Z+
tst r24
breq _LBW1
rcall _Lch
rjmp _LBW
_LBW1: ret;////// Lcd String constants //////////////
_LSc: lpm
adiw zl,0x01
tst r0
breq _LSc1
mov r24,r0
rcall _Lch
rjmp _LSc
_Lsc1: ret;////// Adc ///////////////////////////////
_Adc: sbi ADCSRA,0x06
_Adc1: sbis ADCSRA,0x04
rjmp _Adc1
sbi ADCSRA,0x04
in zl,ADCL
in zh,ADCH
ret;////// IntToStr //////////////////////////
_B2str: clr zh
clt
rjmp _W2st4
_W2str: clt
rjmp _W2st4
_I2str: clt
sbrs zh,0x07
rjmp _W2st4
Com zl
Com zh
subi zl,-0x01
sbci zh,-0x01
Set
_W2st4: push yl
push yh
push r6
clr r6
st -Y,r6
_N2str: ldi r21,0x10
Sub r22,r22
_N2st1: lsr r6
rol zl
rol zh
rol r22
rol r6
cpi r22,0x0a
brcs _N2st2
sbci r22,0x0a
inc zl
_N2st2: dec r21
brne _N2st1
subi r22,-0x30
st -Y,r22
mov r22,zl
Or r22,zh
brne _N2str
_N2st5: brtc _N2st3
ldi zl,0x2d
st -Y,zl
_N2st3: mov zl,yl
pop r6
mov zh,yh
pop yh
pop yl
ret;////// _Waitms ///////////////////////////
_Wms: ldi r20,0x14
_Wms1: ldi r21,0xC6
_Wms2: dec r21
Nop
brne _Wms2
dec r20
brne _Wms1
dec zl
brne _Wms
ret;////// _waitus ///////////////////////////
_wus: ldi r22,52
_wus1: dec r22
brne _wus1
dec zl
brne _wus
ret;////// 8x8 unsigned multiplay ////////////
Mpy8u: push zh
clr zh
ldi r19,0x08
lsr zl
m8u1: brcc m8u2
add zh,r24
m8u2: ror zh
ror zl
dec r19
brne m8u1
pop zh
ret;////// 16x16 unsigned multiplay //////////
Mp16u: clr r23
clr r22
ldi r21,0x10
lsr zh
ror zl
m16u1: brcc m16u2
add r22,r24
Adc r23,r25
m16u2: ror r23
ror r22
ror zh
ror zl
dec r21
brne m16u1
ret;////// 16/16 unsigned division ///////////
Di16u: mov r22,zl
mov r23,zh
mov zl,r24
mov zh,r25
clr r24
Sub r25,r25
ldi r20,0x11
d16u1: rol zl
rol zh
dec r20
brne d16u2
ret
d16u2: rol r24
rol r25
Sub r24,r22
sbc r25,r23
brcc d16u3
add r24,r22
Adc r25,r23
clc
rjmp d16u1
d16u3: sec
rjmp d16u1;////// 16x16 signed multiplay ////////////
Mp16s: clr r23
Sub r22,r22
ldi r21,0x10
m16s1: brcc m16s2
add r22,r24
Adc r23,r25
m16s2: sbrc zl,0
Sub r22,r24
sbrc zl,0
sbc r23,r25
asr r23
ror r22
ror zh
ror zl
dec r21
brne m16s1
ret;////// 16/16 signed division /////////////
Di16s: mov r22,zl
mov r23,zh
mov zl,r24
mov zh,r25
mov r21,zh
eor r21,r23
sbrs zh,0x07
rjmp d16s1
Com zh
Com zl
subi zl,byte1(-0x01)
sbci zh,byte2(-0x01)
d16s1: sbrs r23,0x07
rjmp d16s2
Com r23
Com r22
subi r22,byte1(-0x01)
sbci r23,byte2(-0x01)
d16s2: clr r24
Sub r25,r25
ldi r20,0x11
d16s3: rol zl
rol zh
dec r20
brne d16s5
sbrs r21,7
rjmp d16s4
Com zh
Com zl
subi zl,byte1(-0x01)
sbci zh,byte2(-0x01)
d16s4: ret
d16s5: rol r24
rol r25
Sub r24,r22
sbc r25,r23
brcc d16s6
add r24,r22
Adc r25,r23
clc
rjmp d16s3
d16s6: sec
rjmp d16s3;System Global Variables: 0 bytes
;User Global Variables: 170 bytes
Если из ассемблерного кода удалить
.DSEG
saturation: .Byte 1
.CSEG
То компиляция проходит. Но не удалять же этот участок постоянно?
Отредактировано Sheleh (2018-09-04 19:16:28)